Floating Point Algorithm Development Made Easy in System Generator

System Generator 13.3 added support for bit and cycle accurate, single, double and custom precision-floating-point on many blocks in the Xilinx Blockset. It now has a new "Floating-Point" library under "Xilinx Blockset" in the "Simulink Libary Browser", which lists all blocks supporting floating point numbers (see the "Floating Point Library in Xilinx Blockset" snapshot below).

Memory Initialization Methods

Questions on how to initialize a ROM or RAM come up quite often on FPGA discussion boards and forums. Several methods can be used to initialize memory in RTL, during implementation, and post-implementation when targeting Xilinx FPGA devices. Some of the methods are covered in this blog.

Rearrange Blocks in PlanAhead Schematic Viewer

The Schematic Viewer in PlanAhead is an invaluable tool to help understand and analyze synthesized netlists. PlanAhead 13.3 added a nice feature that allows users to move blocks around in the Schematic Viewer. Users can easily rearrange the schematic to follow the control/data flow or specific structure the design was intended for so they can better visualize the logic as well as use it for documentation purse.

Use Floating License Servers

I used to just set LM_LICENSE_FILE environment variable to all floating license servers for all EDA tools that I use. It had become unacceptably slow to start and run Matlab with LM_LICENSE_FILE (see this Matlab solution for more information), so I switched to use individual environment variable that each EDA vendor checks for licenses. Things have been working a lot better since I made the change. Below is a list of environment variables that tools I run on a regular basis check for a license. This is mainly for my own reference. Hopefully somebody else may also find it useful.

Mentor Graphics: MGLS_LICENSE_FILE
Matlab: MLM_LICENSE_FILE
Synposys: SNPSLMD_LICENSE_FILE
Xilinx: XILINXD_LICENSE_FILE

P.S.: Check AR11630 (http://www.xilinx.com/support/answers/11630.htm) for instructions on how to set up environment variables. My personal favorite tool for setting/editing environment variables is Rapid Environment Editor
P.P.S: Check other Cool Programs in My Toolbox

Ternary Adder with LUT6_2

Xilinx Virtex5 and newer FPGAs have 6-input look up tables with dual outputs (LUT6_2), which can be efficiently used to build ternary adders. The technique is described in details in US patent 7274211. Below is the circuit copied from the patent filing: