This blog serves as a quick reference of common and useful commands for Linux development on ZC702. Check Xilinx Wiki site for more details.
VirtualBox VM (CentOS Recommended)
Assume vmshared is the shared directory name on the Windows host. The mount point on VM is /media/sf_vmshared
All make command lines assume the two environment variables are set in .bash_profile
export CROSS_COMPILE=arm-xilinx-linux-gnueabi-
export ARCH=arm
Create Zynq U-boot
git clone git://git.xilinx.com/u-boot-xlnx.git
cd u-boot-xlnx
make zynq_zc70x_config
make
Outputs:
u-boot, u-boot.bin, u-boot.srec
u-boot-xlnx/tools/mkimage command. Make sure the path to it is added to PATH
Create Linux Kernel
git clone git://git.xilinx.com/linux-xlnx.git
cd linux-xlnx
git checkout xilinx-v14.4
make xilinx_zynq_defconfig
make uImage
Outputs:
Kernel: arch/arm/boot/uImage
Device tree compiler: scripts/dtc/dtc
Create Device Tree
cp arch/arm/boot/dts/zynq-zc702.dts /<any_path>
scripts/dtc/dtc -I dts -O dtb -o /<any_path>/devicetree.dtb /<any_path>/zynq-zc702.dts
Outputs:
Device tree: devicetree.dtb
Root File System
git clone git://git.busybox.net/busybox
cd busybox
make defconfig
make menuconfig
Install location=/home/devel/_rootfs (BusyBox Settings->Installation Options->BusyBox installation prefix)
make install
wget http://matt.ucc.asn.au/dropbear/releases/dropbear-0.53.1.tar.gz
tar xfvz dropbear-0.53.1.tar.gz
cd dropbear-0.53.1
./configure --prefix=/home/devel/_rootfs --host=arm-xilinx-linux-gnueabi --disable-zlib CC=arm-xilinx-linux-gnueabi-gcc LDFLAGS="-Wl,--gc-sections" CFLAGS="-ffunction-sections -fdata-sections -Os"
make PROGRAMS="dropbear dbclient dropbearkey dropbearconvert scp" MULTI=1 strip
sudo make install
ln -s ../../sbin/dropbear /home/devel/_rootfs/usr/bin/scp
Outputs:
Kernel: arch/arm/boot/uImage
Device tree compiler: scripts/dtc/dtc
SD Card
Starting in 14.2, the SD Card is automatically mounted on /mnt during the boot process.
A user script init.sh can be created on the SD card, which will be automatically executed at the end of boot by /etc/init.d/rcS .
OSL Tags, Timestamps
14.4 OSL
Git Tag: xilinx-v14.7
14.4 OSL
Git Tag: xilinx-v14.4
U-Boot 2012.10 (Dec 17 2012 - 10:57:07)
14.3 OSL
Git tag: xilinx-14.3-build2
U-Boot 2012.04.01-00304-g7639205 (Oct 23 2012 - 08:29:31)
Linux version 3.5.0-14.3-build2
Useful Git Commands
Fetch the latest date from the remote repository
git pull
List all tags in the local repository
git tag
Check out a tagged release
git checkout tag_name
Check with tagged release is checked out
git describe --tags
Useful Linux Commands on ZC702
Manually set IP address for ZC702
ifconfig eth0 192.168.1.10 netmask 255.255.255.0 up
Copy files to the SD card: it is important to sync the data back to the disk or umount the card if needed
sync
umount /mnt
Check if CPU1 is online
less /sys/devices/system/cpu/cpu1/online
Thursday, January 10, 2013
Sunday, March 25, 2012
FPGA Editor Tutorial 1: Check routability between pins
You may have seen warning messages from map or par like the one below:
These warning messages make you wonder if this "un-routable situation" is due to the physical layout and/or lack of routing resources in the device or some DRC rules in the software to promote best practice. The quickest and most authoritative way to find out the answer is to check it out in FPGA Editor. Below are step-by-step instructions on how to do that using BUFG driving DSP CE pin as an example:
Warning:LIT:683 - DSP48E1 symbol
"Inst_mult" has one or more CE pins driven by BUFG/BUFH/BUFR. This can lead to an un-routable situation.
"Inst_mult" has one or more CE pins driven by BUFG/BUFH/BUFR. This can lead to an un-routable situation.
These warning messages make you wonder if this "un-routable situation" is due to the physical layout and/or lack of routing resources in the device or some DRC rules in the software to promote best practice. The quickest and most authoritative way to find out the answer is to check it out in FPGA Editor. Below are step-by-step instructions on how to do that using BUFG driving DSP CE pin as an example:
Tuesday, January 24, 2012
Floating Point Algorithm Development Made Easy in System Generator
System Generator 13.3 added support for bit
and cycle accurate, single, double and custom precision-floating-point on many blocks in the Xilinx Blockset. It now has a new "Floating-Point" library under "Xilinx Blockset" in the "Simulink Libary Browser", which lists all blocks supporting floating point numbers (see the "Floating Point Library in Xilinx Blockset" snapshot below).
Saturday, December 31, 2011
Memory Initialization Methods
Questions on how to initialize a ROM or RAM come up quite often on FPGA discussion boards and forums. Several methods can be used to initialize memory in RTL, during implementation, and post-implementation when targeting Xilinx FPGA devices. Some of the methods are covered in this blog.
Saturday, November 5, 2011
Rearrange Blocks in PlanAhead Schematic Viewer
The Schematic Viewer in PlanAhead is an invaluable tool to help understand and analyze synthesized netlists. PlanAhead 13.3 added a nice feature that allows users to move blocks around in the Schematic Viewer. Users can easily rearrange the schematic to follow the control/data flow or specific structure the design was intended for so they can better visualize the logic as well as use it for documentation purse.
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