Wednesday, December 16, 2009

SysGen: Create New HWCOSIM Target with NMM Ports

Hardware Co-Simulation (HWCOSIM) is a great feature in System Generator (SysGen) that allows users to run the full or part of a SysGen design on the FPGA and increase the simulation speed dramatically. SysGen already includes HWCOSIM plugins for commonly used DSP demo boards. Users can easily use the SysGen Board Description Builder (SBDBuilder) to create new HWCOSIM plugins for unsupported boards or unsupported features (for example non-memory mapped or NMM ports) on existing boards. Below are  step-by-step instructions on how to create a new HWCOSIM plugin with NMM ports using ML506 as an example.

Step 1: Open "System Generator" properties window and select "New Compilation Target".

Step 2: The SBDBuilder window pops up.
Board Name: use a descriptive name so you know what the target is later.
System Clock Frequency/Pin Location: enter the actual clock frequency and pin location for your board.
JTAG Options Boundary Scan Position: the position of the target device in the JTAG chain. You can use IMPACT to help fill this in (see a snapshot below for the JTAG chain detected by IMPACT). As shown in the JTAG chain snapshot, the target device xc5vsx50t is the 5th in the chain.
JTAG Options IR Lengths: click the "Detect" button next to it auto-fill it.
Target Devices: click "Add" button to select the target device.


Step 3: Click "Add" button in the "Non-Memory Mapped Ports" section to add NMM ports for HWCOSIM. This brings up the "Configure a Port" window below. Enter a port name, select port direction, Pin LOC and select PULLUP or PULLDOWN if needed. Click "Add Pin" button and the newly added pin will show up in the Pin List below. Click "Save and Start New" button if you want to add more pins or click "Save and Close" if you are done adding NMM ports.

Step 4: The SBDBuilder with all information entered is shown below. Click the "Install" button to install the new board configuration to the SysGen plugins directory.

Step 5: A window with tokens for the NMM ports will pop up once the installation is complete.

Step 6: Save the library with the NMM port tokens and they can now be used in your SysGen model like any other SysGen block. A test model is shown below.


 Step 7: Open "System Generator" properties window again and now you should see the newly created board "ML506 JTAG NMM" in the HWCOSIM target list. Select it as the compilation target.


Step 8: That's it. The rest of steps to use the new compilation target are the same as any other HWCOSIM. The only difference is that Simulink no longer has control/visibility of the two NMM ports. They are now implemented as IOs on FPGA. In this example, while the simulation is running, if you toggle the GPIO SW1 on the board, it will turn on/off the GPIO LED0.

11 comments:

  1. Thanks for this! Do you know how to define NMM ports when using Ethernet (point-to-point) co-simulation instead of JTAG? I have tried the manual way, but does not work.

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  2. Thanks it is a good help for the beginners with FPGA.

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  3. Is it possible to implement ethernet based hw-co-sim on ML507?
    It doesn't look like.

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  4. hello...can you help me with spartan3 DSP xc3S400-4PQ208 kit on the same topic..??

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  5. @php008 Is it a Xilinx development kit? Or your own board?

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  6. Hello, can you provide some tutorial about displaying waveform using DVI connector in Virtex 5 ML505?
    Thanks

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  7. HI, I am getting the following error while trying to use hardware co-sim to glow LED array on the ml605 board.

    "
    Begin generation
    Checking model status
    Checking simulation times
    Performing compilation and generation
    Compilation and generation completed in 7.609 seconds

    *** ERROR ***

    An error was encountered while compiling the design for hardware co-simulation.

    "

    Could you please help ? Thanks a lot!
    Basil

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  8. Hi,

    I followed your guide step by step and applied it to the Nexys3 board, however at the end I get the same error as was posted in the xilinx forum:
    http://forums.xilinx.com/t5/DSP-Tools/Invalid-Device-index-on-Hardware-cosimulaion/td-p/327501

    I'm a 100% sure it's not the connection to the board, since I'm able to run a FFT v7.1 on the board. Somehow I'm unable to control a LED or read a Switch value.

    Do you have any suggestions what I could try?

    cheers,
    Niek

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    Replies
    1. The bitstream seems to work fine. I used Adept from Digilent to program the nexys3 board with the compiled stream. I connected a gpio_led pin to a constant, and the LED shines bright when the board is programmed.

      So I might suspect something goes wrong in Sysgen/Simulink/Matlab, when dealing with NMM ports.

      Does one have to use all the NMM ports in the design? or can one also select only a few?
      for instance, I mapped all 8 LEDS, however I'm only trying to control 1 from simulink.

      cheers,
      Niek

      Delete
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    JTAG

    ReplyDelete