tag:blogger.com,1999:blog-419958562532914083.post5863126204202839988..comments2023-09-07T02:29:55.059-04:00Comments on Jim Wu's FPGA Blog: DDR OFFSET IN/OUT constraints with DCMJim Wuhttp://www.blogger.com/profile/14984103795351065801noreply@blogger.comBlogger2125tag:blogger.com,1999:blog-419958562532914083.post-17778333881820586852015-11-17T18:12:12.852-05:002015-11-17T18:12:12.852-05:00You ISE project link is deadYou ISE project link is dead9Ghttps://www.blogger.com/profile/04959833638496737330noreply@blogger.comtag:blogger.com,1999:blog-419958562532914083.post-40841176179983326202014-07-08T19:28:45.619-04:002014-07-08T19:28:45.619-04:00Jim, very nice tutorials. You answer some very spe...Jim, very nice tutorials. You answer some very specific questions about FPGA development for advanced designers. For introductory Verilog and VHDL tutorials check out www.nandland.com.Nandlandhttp://www.nandland.comnoreply@blogger.com